A Triple Latched Ultra-Low-Voltage Rail-to-Rail ICMR Standard-Cell Based Comparator

A triple latched NOR2-based standard-cell comparator, with Rail-to-Rail input common mode range (ICMR) is presented. The topology aims at lowering the clock-to-output delay with respect to the previously presented standard-cell-based comparators with Rail-to-Rail ICMR feature. Moreover, the achieved speed is higher than the NOR2-based topology previously presented by the authors, and the improvements are in the order of $3 \times$ to $20 \times$ higher speed and $3 \times$ to $12 \times$ lower PDP, with respect to the other standard-cell-based Rail-to-Rail ICMR topologies in literature. The circuit has been validated considering a 45 nm CMOS technology and the power supply voltage scaled down to $0.6 \mathrm{~V}, 0.3 \mathrm{~V}$ and 0.15 V.