Analysis of a Three-Way Voltage-Mode Digital Doherty Power Amplifier for Bluetooth Applications

This paper investigates a multi-class, Three-Way digital Doherty power amplifier (DDPA) for Bluetooth applications, that achieves a peak output power of 20 dBm, using a 0.7 V supply voltage. The proposed Three-Way DDPA is made of three Switched-Capacitor Power Amplifiers (SCPAs), power combined with an on-chip Series Combining Transformer (SCT). The Three-Way DDPA is implemented in a 22 nm bulk CMOS technology, with the main goal of supporting all the BT/BLE power classes, efficiently. The technique of the Dual Line Up (DLU) is leveraged to achieve good efficiencies both at low and high power. Simulation results show that the proposed power amplifier features three efficiency peaks at $\mathbf{0}, \mathbf{1 0}$ and $\mathbf{1 9. 3 ~ d B}$ Power-Back Off (PBO) with drain efficiencies of $\mathbf{4 7 \%, 4 7 \%}$, and $\mathbf{4 0 \%}$, respectively.

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Publication Details

Published
2025-09-21
DOI
https://doi.org/10.1109/prime66228.2025.11203334
Primary Topic
Advanced Power Amplifier Design
Type
article
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article

Analysis of a Three-Way Voltage-Mode Digital Doherty Power Amplifier for Bluetooth Applications

Andrea Bevilacqua, Davide Ponton, David Seebacher, Edoardo Baiesi Fietta
Advanced Power Amplifier Design
article

Analysis of a Three-Way Voltage-Mode Digital Doherty Power Amplifier for Bluetooth Applications

Andrea Bevilacqua, Davide Ponton, David Seebacher, Edoardo Baiesi Fietta
article en

Abstract

This paper investigates a multi-class, Three-Way digital Doherty power amplifier (DDPA) for Bluetooth applications, that achieves a peak output power of 20 dBm, using a 0.7 V supply voltage. The proposed Three-Way DDPA is made of three Switched-Capacitor Power Amplifiers (SCPAs), power combined with an on-chip Series Combining Transformer (SCT). The Three-Way DDPA is implemented in a 22 nm bulk CMOS technology, with the main goal of supporting all the BT/BLE power classes, efficiently. The technique of the Dual Line Up (DLU) is leveraged to achieve good efficiencies both at low and high power. Simulation results show that the proposed power amplifier features three efficiency peaks at $\mathbf{0}, \mathbf{1 0}$ and $\mathbf{1 9. 3 ~ d B}$ Power-Back Off (PBO) with drain efficiencies of $\mathbf{4 7 \%, 4 7 \%}$, and $\mathbf{4 0 \%}$, respectively.

University of Padua (IT), Infineon Technologies (Austria) (AT)
Openalex Percentile: Top 70%
Advanced Power Amplifier Design
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