A Reconfigurable Memristor-Based Computing-in-Memory Circuit for Content-Addressable Memory in Sensor Systems

To meet the demand for energy-efficient and high-performance computing in resource-limited sensor edge applications, this paper presents a reconfigurable memristor-based computing-in-memory circuit for Content-Addressable Memory (CAM). The scheme exploits the analog multi-level resistance characteristics of memristors to enable parallel multi-bit processing, overcoming the constraints of traditional binary computing and significantly improving storage density and computational efficiency. Furthermore, by employing dynamic adjustment of the mapping between input signals and reference voltages, the circuit supports dynamic switching between exact and approximate CAM modes, substantially enhancing functional flexibility. Experimental results demonstrate that the 32 × 36 memristor array based on a TiN/TiOx/HfO₂/TiN structure exhibits eight stable and distinguishable resistance states with excellent retention characteristics. In large-scale array simulations, the minimum voltage separation between state-representing waveforms exceeds 6.5 mV, ensuring reliable discrimination by the readout circuit. This work provides an efficient and scalable hardware solution for intelligent edge computing in next-generation sensor networks, particularly suitable for real-time biometric recognition, distributed sensor data fusion, and lightweight artificial intelligence inference, effectively reducing system dependence on cloud communication and overall power consumption.