High‐Performance Pose Measurement Based on <scp>CUDA</scp>

ABSTRACT High‐resolution image processing increasingly necessitates parallelism to meet real‐time demands, as traditional CPU‐based visual measurement systems struggle with the computational load. Leveraging NVIDIA GPU hardware and the Compute Unified Device Architecture (CUDA), this paper introduces a vision system designed for high‐speed pose estimation, underpinned by parallel image processing algorithms. Specifically, we analyze existing GPU‐based Komura Equivalence algorithms and propose a novel parallel connected component labeling algorithm implemented in CUDA. This algorithm efficiently identifies boundary conditions of connected components and eliminates redundant operations inherent in conventional approaches. System pose is solved using the known spatial relationship between pre‐designed cooperative targets and their extracted features. To validate system efficacy, comprehensive experiments were conducted on an NVIDIA Jetson Xavier NX embedded platform. Simulation results demonstrate significant speed improvements: the proposed parallel feature extraction algorithm achieves a &gt; 20 × speedup over traditional CPU algorithms and outperforms the Komura Equivalence algorithm by a factor exceeding 1.2×. Real‐world measurement results indicate a sustained processing rate of 581 frames per second (fps) at 1280 × 1024 resolution. Positional measurement errors remain below 1.5 mm, while roll and pitch angle estimation errors are bounded within 0.2.