Dual voltage-dependent mechanisms of single-event leakage current in SiC trench MOSFETs: Heavy-Ion irradiation and TCAD simulation study

In this work, the single-event leakage current (SELC) in silicon carbide dual-trench MOSFETs (DT-MOSFETs) was systematically investigated through 181 Ta 31+ heavy-ion irradiation experiments and TCAD simulations. Results show that at drain voltages V DS < 100 V, irradiation mainly generates fixed positive charges and interface traps in the gate oxide, shifting subthreshold characteristics and creating a drain-source conduction path, which increases off-state leakage current. At V DS ≥ 100 V, the drain voltage is directly applied across the gate oxide via a low-resistance carrier path induced by irradiation, causing the local electric field to exceed the damage threshold and resulting in an additional gate leakage path, thereby raising gate leakage current. Reverse recovery tests ruled out body diode damage, while capacitance characterization and electric field simulations confirmed the damage is concentrated in the bottom gate oxide region. This study reveals a dual voltage-dependent SELC mechanism in DT-MOSFETs: trap-induced drain-source leakage under low electric fields and gate oxide damage-induced gate-source leakage under high electric fields. These findings offer critical theoretical and practical guidance for radiation-hardened design of COTS devices for aerospace applications, particularly in gate oxide optimization and operating voltage selection. • Identified 100 V threshold for dual leakage modes: Below 100 V, irradiation creates drain-source path via gate oxide traps; above 100 V, drain voltage ruptures bottom gate oxide, adding irreversible gate leakage. • Multi-technique localization to bottom gate oxide: Reverse recovery tests ruled out body diode damage; capacitance/field simulations confirmed damage concentrated solely in bottom gate oxide region. • Strategies for enhancing radiation tolerance in COTS devices: Reducing the SELC effect through improvements in bottom gate oxide quality and structure.

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Publication Details

Journal
Nuclear Engineering and Technology
Published
2025-10-15
DOI
https://doi.org/10.1016/j.net.2025.103979
Primary Topic
Silicon Carbide Semiconductor Technologies
Type
article
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article

Dual voltage-dependent mechanisms of single-event leakage current in SiC trench MOSFETs: Heavy-Ion irradiation and TCAD simulation study

Wanzhao Cui, Yanxing Song, Dexin Chen, Fei Cao et al.
Nuclear Engineering and Technology
Silicon Carbide Semiconductor Technologies
article

Dual voltage-dependent mechanisms of single-event leakage current in SiC trench MOSFETs: Heavy-Ion irradiation and TCAD simulation study

Wanzhao Cui, Yanxing Song, Dexin Chen, Fei Cao, Ying Wang
article en

Abstract

In this work, the single-event leakage current (SELC) in silicon carbide dual-trench MOSFETs (DT-MOSFETs) was systematically investigated through 181 Ta 31+ heavy-ion irradiation experiments and TCAD simulations. Results show that at drain voltages V DS < 100 V, irradiation mainly generates fixed positive charges and interface traps in the gate oxide, shifting subthreshold characteristics and creating a drain-source conduction path, which increases off-state leakage current. At V DS ≥ 100 V, the drain voltage is directly applied across the gate oxide via a low-resistance carrier path induced by irradiation, causing the local electric field to exceed the damage threshold and resulting in an additional gate leakage path, thereby raising gate leakage current. Reverse recovery tests ruled out body diode damage, while capacitance characterization and electric field simulations confirmed the damage is concentrated in the bottom gate oxide region. This study reveals a dual voltage-dependent SELC mechanism in DT-MOSFETs: trap-induced drain-source leakage under low electric fields and gate oxide damage-induced gate-source leakage under high electric fields. These findings offer critical theoretical and practical guidance for radiation-hardened design of COTS devices for aerospace applications, particularly in gate oxide optimization and operating voltage selection. • Identified 100 V threshold for dual leakage modes: Below 100 V, irradiation creates drain-source path via gate oxide traps; above 100 V, drain voltage ruptures bottom gate oxide, adding irreversible gate leakage. • Multi-technique localization to bottom gate oxide: Reverse recovery tests ruled out body diode damage; capacitance/field simulations confirmed damage concentrated solely in bottom gate oxide region. • Strategies for enhancing radiation tolerance in COTS devices: Reducing the SELC effect through improvements in bottom gate oxide quality and structure.

Nuclear Engineering and TechnologyVol. 58(2)
Northwestern Polytechnical University (CN), Dalian Maritime University (CN)
Openalex Percentile: Top 71%
Silicon Carbide Semiconductor Technologies
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