Scalable Graphene–MoS2 Lateral Contacts for High-Performance 2D Electronics

As the scaling of silicon-based CMOS technology approaches its physical limits, two-dimensional (2D) materials have emerged as promising alternatives for future electronic devices. Among them, MoS₂ is a leading candidate due to its fascinating semiconducting nature and compatibility with CMOS processes. However, high contact resistance at the metal-MoS₂ interface remains a major bottleneck, limiting device performance. In this study, we report the fabrication and characterization of graphene-MoS₂ (Gr-MoS₂) lateral heterostructure FETs, where monolayer graphene, synthesized by inductively coupled plasma chemical vapor deposition (ICP-CVD), is directly used as the source and drain. Bilayer MoS₂ is selectively grown along graphene edges via edge-guided CVD, forming a chemically bonded in-plane junction without transfer steps. Electrical measurements reveal that the Gr-MoS₂ FETs exhibit a threefold increase in average field-effect mobility (3.9 vs. 1.1 cm² V^-1 s^-1) compared to conventional MoS₂ FETs. Y-function analysis shows that the contact resistance is significantly reduced from 85.8 kΩ to 20.5 kΩ at V_G = 40 V. These improvements are attributed to the replacement of the conventional metal-MoS₂ contact with a graphene-metal contact. Our results demonstrate that lateral heterostructure engineering with graphene provides an effective and scalable strategy for high-performance 2D electronics.