Preparation, Characterization, and Simulation Prediction of MoS ₂ Transistors

The advent of molybdenum disulfide (MoS<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${}_{{2}}\text {)}$</tex-math> </inline-formula> offers hope for transistor continuous scaling. In this study, the back-gate monolayer MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> transistors at different channel lengths are prepared, and their electrical properties are tested, respectively. The back-gate MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> transistor exhibits a maximum conducting current of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4.59~\mu $</tex-math> </inline-formula>A and a switching ratio of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.3\times 10^{5}$</tex-math> </inline-formula>. The ratio of contact resistance to the total resistance is up to 33%, indicating that the contact between MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and the electrode is one of the main factors restricting its performance. Technology Computer-Aided Design (TCAD) simulations are also used to predict the performance of a smaller channel-length MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> transistor (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$L_{g} =12$</tex-math> </inline-formula> nm). We set the MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> material parameters and construct a monolayer MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> nanosheet FET (NSFET) using TCAD. The simulation result of this structure shows a subthreshold swing (SS) of 68.9 mV/dec, a drain-induced barrier lowering (DIBL) value of 14.98 mV/V and a conduction current of 243.3<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>A/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m at the gate voltage of 0.7V. By comparing its performance with the most advanced silicon-based devices, MoS<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> exhibits excellent electrostatic properties and holds great potential for replacing silicon as a channel material.