A Ring Oscillator-Based Strong Physical Unclonable Function With Excellent Resilience to Machine Learning Attacks
Physical Unclonable Functions (PUFs) are excellent hardware security primitives for low-power IoT devices. This paper presents a multi-bit, ring oscillator-based strong PUF that can be implemented in any CMOS IC while occupying a very small area. The inherent CMOS process-induced variations in ring oscillators and low-area capacitors are combined to create distinct PUF tokens. A temperature compensation scheme, using both circuit techniques and a post-processing algorithm is implemented to stabilize the oscillator frequencies against temperature variations. The measured frequencies of the oscillators are used to generate stable challenge-response pairs (CRPs). The proposed CRP generation algorithm can generate <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i>! CRPs from the measured frequencies of an array of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i> oscillators, which makes it a strong PUF implementation. For each challenge, the algorithm provides a multi-bit output. A prototype device comprising of nine on-chip ring oscillators with distinct additional capacitors was fabricated in a commercial 180nm CMOS process. The proposed CRP generation algorithm could derive 362,880 challenge-response pairs (CRPs) from the measured frequencies of the chip. The algorithm produces a 10-bit response for each challenge, unlike the single-bit response generated in conventional ring oscillator PUFs. The average uniqueness and uniformity of the generated CRPs are 49.16% and 52.52% respectively. The proposed system is also tested against various machine learning-based modelling attacks. The mean prediction accuracy of the CRPs produced from several test chips is as low as 0.1%, which is close to the theoretical random prediction percentage. The distinct PUF architecture and robustness of the proposed algorithm contribute to excellent resilience against machine learning attacks. The bit errors were also suppressed across a temperature range of 0° to 100°C. The PUF circuit occupies an area of 540 × 430 μ<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</i><sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and draws a total power of 0.71 mW from a 1.8V supply.
Authors
- K Padmakumar
- Deepu Roy
- A Anupama
- Immanuel Raja (ORCID: https://orcid.org/0000-0002-2960-3644)
Institutions
- Vikram Sarabhai Space Centre (IN)
- Indian Institute of Space Science and Technology (IN)
Publication Details
- Journal
- IEEE Internet of Things Journal
- Published
- 2025-10-14
- DOI
- https://doi.org/10.1109/jiot.2025.3621271
- Citations
- 1
- Primary Topic
- Physical Unclonable Functions (PUFs) and Hardware Security
- Type
- article
- Field-Weighted Citation Impact
- 2.27