Thermal Dissipation and Stabilization for On-Chip Photovoltaic Cell by Floated and Biased Guard Ring

Photovoltaic cell performance decreases with increasing temperature, and on-chip integrated photovoltaic cells may suffer from thermal flow from electrical circuits in other areas of large-scale-integrated chips. This study investigates the concept of thermal dissipation from on-chip integrated photovoltaic cells via the surrounding guard ring and Peltier effect. The placement of a guard ring around the cell allows heat flux to escape before reaching the cell, and utilizing the Peltier effect enhances its contribution. I numerically evaluated the effects of two thermal dissipation techniques: a passive method using a heat sink via floating contact and an active method using the Peltier effect. Results showed that metal contacts directly formed worked to escape heats, and electrical parameters such as surface recombination velocity, electrical bias voltages were meaningless. However, electrical bias worked to stabilize electric field distribution inside the substrate, then positive bias was useful to enhance photovoltaic cell performances. An electrically enhanced (E<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>) photovoltaic cell concept that features robustness against both thermal and electrical disturbances was proposed.