MLoF: Machine Learning Accelerators for the Low-Cost FPGA Platforms
In Internet of Things (IoT) scenarios, it is challenging to deploy Machine Learning (ML) algorithms on low-cost Field Programmable Gate Arrays (FPGAs) in a real-time, cost-efficient, and high-performance way. This paper introduces Machine Learning on FPGA (MLoF), a series of ML IP cores implemented on the low-cost FPGA platforms, aiming at helping more IoT developers to achieve comprehensive performance in various tasks. With Verilog, we deploy and accelerate Artificial Neural Networks (ANNs), Decision Trees (DTs), K-Nearest Neighbors (k-NNs), and Support Vector Machines (SVMs) on 10 different FPGA development boards from seven producers. Additionally, we analyze and evaluate our design with six datasets, and compare the best-performing FPGAs with traditional SoC-based systems including NVIDIA Jetson Nano, Raspberry Pi 3B+, and STM32L476 Nucle. The results show that Lattice’s ICE40UP5 achieves the best overall performance with low power consumption, on which MLoF averagely reduces power by 891% and increases performance by 9 times. Moreover, its cost, power, Latency Production (CPLP) outperforms SoC-based systems by 25 times, which demonstrates the significance of MLoF in endpoint deployment of ML algorithms. Furthermore, we make all of the code open-source in order to promote future research.
Authors
- Tianyu Wu (ORCID: https://orcid.org/0000-0003-0602-5631)
- Ming Ling (ORCID: https://orcid.org/0000-0002-8866-7189)
- Yuchen Zheng (ORCID: https://orcid.org/0000-0003-3093-6929)
- Ruiqi Chen (ORCID: https://orcid.org/0000-0001-6837-5675)
Institutions
- University of North Carolina at Chapel Hill (US)
Publication Details
- Journal
- UNC Libraries
- Published
- 2025-05-22
- DOI
- https://doi.org/10.17615/29wr-jk55
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00