Proposed a Ternary Inverter and a Ternary Decoder using CNTFET

The Multiple-Value Logic (MVL) circuit significantly enhances propagation delay and energy consumption compared to the binary circuit. Additionally, the Carbon Nanotube Field-Effect Transistor (CNTFET) demonstrates enhancements in energy efficiency and circuit speed when compared to other transistor technologies. Therefore, this paper proposes two circuit designs: (a) a Standard Ternary Inverter (STI) and (b) a Ternary Decoder (TDecoder) using CNTFET, which can create additional ternary circuits such as ternary adders, multipliers, and multiplexers. The investigation and proposed circuits were simulated and tested with the HSpice simulator. The simulation results demonstrate the approach’s merits in reducing energy consumption for STI by over 28% and for TDecoder by over 11% compared to the best-case design, respectively.