Accumulation-mode SiC Trench MOSFET

Due to their deficient gate oxide quality, low electron mobility (μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf>) values in silicon-carbide (4H-SiC) MOSFETs have been reported so far. Therefore, in addition to efforts to directly improve this, alternative FETs have been proposed that offer higher μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf>. Examples are the SiC trench MOSFET, where current flows vertically along a different crystal surface, and the (lateral) SiC accumulation-mode FET (AccuFET). In this work an alternative device is studied, i.e. the SiC trench AccuFET. The main advantage compared to reported counterparts is that this vertical structure does not require a p-type layer in the channel which will increase μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf>, and thus offers a low specific on-resistance (R<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on.sp</inf>). After careful calibration of both μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf> and the impactionization (II) coefficients obtained from reported experimental data, extensive TCAD simulations have been performed. The results show low R<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on,sp</inf>’s ranging from 0.56 to 2.09 mQ•cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for breakdown voltages (BVs) ranging from 1.5kV to 2.5kV. In addition, e-mode behavior and low reverse leakage current densities (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rev</inf> /A ≈ 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−9</sup> A/cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>) for temperatures up to T=425K have been obtained.

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Published
2025-08-27
DOI
https://doi.org/10.1109/isps65707.2025.11189975
Primary Topic
Silicon Carbide Semiconductor Technologies
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article

Accumulation-mode SiC Trench MOSFET

Niels R. Tas, Erwin Berenschot, R.J.E. Hueting, Hamed Abnavi et al.
Silicon Carbide Semiconductor Technologies
article

Accumulation-mode SiC Trench MOSFET

Niels R. Tas, Erwin Berenschot, R.J.E. Hueting, Hamed Abnavi, Simone D. Dulfer, Céline Steenge
article en

Abstract

Due to their deficient gate oxide quality, low electron mobility (μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf>) values in silicon-carbide (4H-SiC) MOSFETs have been reported so far. Therefore, in addition to efforts to directly improve this, alternative FETs have been proposed that offer higher μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf>. Examples are the SiC trench MOSFET, where current flows vertically along a different crystal surface, and the (lateral) SiC accumulation-mode FET (AccuFET). In this work an alternative device is studied, i.e. the SiC trench AccuFET. The main advantage compared to reported counterparts is that this vertical structure does not require a p-type layer in the channel which will increase μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf>, and thus offers a low specific on-resistance (R<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on.sp</inf>). After careful calibration of both μ<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</inf> and the impactionization (II) coefficients obtained from reported experimental data, extensive TCAD simulations have been performed. The results show low R<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on,sp</inf>’s ranging from 0.56 to 2.09 mQ•cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for breakdown voltages (BVs) ranging from 1.5kV to 2.5kV. In addition, e-mode behavior and low reverse leakage current densities (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rev</inf> /A ≈ 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−9</sup> A/cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>) for temperatures up to T=425K have been obtained.

University of Twente (NL)
Openalex Percentile: Top 72%
Silicon Carbide Semiconductor Technologies
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