Netlistify: Transforming Circuit Schematics into Netlists with Deep Learning
Analog and mixed-signal (AMS) circuits are commonly represented as schematic images in textbooks, research papers, patents, and other technical documents to facilitate understanding. However, AMS design workflows rely on netlists rather than schematics for tasks such as modeling, simulation, automated circuit sizing, and layout synthesis. Converting schematic images into netlists is a challenging task due to the wide variety of circuit components and the complexity of their connectivity. This paper presents Netlistify, an automated deep learning-based tool that transforms schematic diagrams into netlists through precise component recognition, orientation detection, and connectivity analysis and extraction. Unlike traditional methods that rely on fixed algorithmic rules for connectivity extraction, Netlistify employs deep learning to comprehensively analyze both components and their interconnections, offering a detailed understanding of circuit structures and significantly improving netlist generation accuracy. By addressing the challenges of connectivity complexity with a data-driven approach, Netlistify provides a robust and efficient solution for schematic interpretation. Experimental results demonstrate that Netlistify achieves high accuracy, surpassing state-of-the-art methods and showing great promise for AMS design data collection and seamless integration into modern design automation workflows.
Authors
- Mark Po-Hung Lin
- H.J.H. Chen
- Haoxing Ren (ORCID: https://orcid.org/0000-0003-1028-3860)
- Wenhao Liu (ORCID: https://orcid.org/0000-0002-4499-2967)
- Chun-Yen Huang
- H.-L. Ho
- Pei-Hsin Kang
Institutions
- Nvidia (United Kingdom) (GB)
- National Yang Ming Chiao Tung University (TW)
Publication Details
- Published
- 2025-09-08
- DOI
- https://doi.org/10.1109/mlcad65511.2025.11189145
- Citations
- 1
- Primary Topic
- VLSI and FPGA Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.73