Invited Paper: MLCAD 2025 Contest on ReSynthAI: Physical-aware Logic Resynthesis using AI

As Moore’s Law slows, enhancements in power, performance, and area (PPA) increasingly rely on innovations in EDA rather than process scaling. Logic optimization is critical in the RTL-to-GDSII flow, yet traditional approaches remain heuristic-driven and time-consuming. Recent advances in machine learning (ML) and GPU computing present new opportunities to transform logic optimization. By leveraging artificial intelligence (AI) — encompassing both advanced ML techniques and GPU-accelerated computation — a wide range of physically-aware resynthesis strategies becomes possible. These include predicting downstream impacts of early-stage design decisions, using generative models to propose logic transformations directly, and accelerating placement and routing to obtain physical feedback rapidly. This paper introduces the MLCAD 2025 Contest, ReSynthAI, which incorporates post-global-route physical awareness into logic resynthesis after floorplanning. The contest provides a complete infrastructure, including benchmarks in standard EDA and ML-friendly formats, and examples of "ML inside" EDA tools using Python APIs. It leverages OpenROAD and CircuitOps, enabling participants to build on accessible, open-source tools and data formats. With 27 registered teams, the contest demonstrates strong momentum in ML-driven timing optimization and its growing community impact.

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Publication Details

Published
2025-09-08
DOI
https://doi.org/10.1109/mlcad65511.2025.11189135
Citations
1
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
2.27
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article

Invited Paper: MLCAD 2025 Contest on ReSynthAI: Physical-aware Logic Resynthesis using AI

Rongjian Liang, Haoxing Ren, Anindya Dey, Vidya A. Chhabria et al.
1 citations
VLSI and Analog Circuit Testing
2.27
article

Invited Paper: MLCAD 2025 Contest on ReSynthAI: Physical-aware Logic Resynthesis using AI

Rongjian Liang, Haoxing Ren, Anindya Dey, Vidya A. Chhabria, Vikram Gopalakrishnan, Yanqing Zhang
article en
1 citations

Abstract

As Moore’s Law slows, enhancements in power, performance, and area (PPA) increasingly rely on innovations in EDA rather than process scaling. Logic optimization is critical in the RTL-to-GDSII flow, yet traditional approaches remain heuristic-driven and time-consuming. Recent advances in machine learning (ML) and GPU computing present new opportunities to transform logic optimization. By leveraging artificial intelligence (AI) — encompassing both advanced ML techniques and GPU-accelerated computation — a wide range of physically-aware resynthesis strategies becomes possible. These include predicting downstream impacts of early-stage design decisions, using generative models to propose logic transformations directly, and accelerating placement and routing to obtain physical feedback rapidly. This paper introduces the MLCAD 2025 Contest, ReSynthAI, which incorporates post-global-route physical awareness into logic resynthesis after floorplanning. The contest provides a complete infrastructure, including benchmarks in standard EDA and ML-friendly formats, and examples of "ML inside" EDA tools using Python APIs. It leverages OpenROAD and CircuitOps, enabling participants to build on accessible, open-source tools and data formats. With 27 registered teams, the contest demonstrates strong momentum in ML-driven timing optimization and its growing community impact.

Nvidia (United Kingdom) (GB), Arizona State University (US)
Openalex Percentile: Top 11%
VLSI and Analog Circuit Testing
2.27
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