Context-Enhanced Architectural Specification Generation for SoC Designs

Architectural specification documents are valuable design resources that provide a high-level overview of hardware designs. However, these specifications are often missing or incomplete in many open-source RTL codebases due to various factors, impeding design understanding and reuse. An appealing idea is to leverage LLMs to automatically create architectural specification from the RTL code. Unfortunately, LLMs struggle with understanding large projects consisting of multiple RTL source files. In this work, we propose a context-enhanced automatic architectural specification generation framework called CASGen. CASGen constructs automates the construction of architectural specifications from RTL code using LLMs. Our main insight for generating high-quality architectural specifications is to preprocess the RTL codebase using traditional methods to enhance the LLMs reasoning capabilities using in-context learning. The CASGen leverages an RTL synthesis tool to extract RTL module hierarchy, connectivity, and instantiations of a design. This extracted context is then combined with project metadata the quality of the LLM generation. The project is evaluated using a dataset of 30 human expert-curated designs and 662 open-source hardware design projects. (The curated dataset is constructed by us and will be released to the community upon the publication of this paper). The experimental evaluation shows that CASGen generates more accurate specifications compared with LLM-based approaches without any preprocessing. Our approach improves BLEU score improved by approximately 27.8% and ROUGE-L by 3.4%.