ML-Inspired Logic Synthesis: Improving Multiplier Circuits

This paper presents an ML-inspired logic synthesis framework to synthesize logic circuits from specification, unlocking logic optimization to reach new, unexplored, solutions in the design space. Based on a given template, the proposed framework creates and trains a model using a novel backpropagation method, don’t-care-based backpropagation, which makes it possible to learn non-differentiable attributes of logic circuits efficiently. We ensure the resulting circuit is functionally correct by adding a patch for the cases in which the model is not 100% accurate. To demonstrate its effectiveness, we apply the proposed framework to synthesis of new multiplier circuits. The resulting multipliers are significantly smaller than the best known implementations, with up to 32.8% area reduction. Finally, the generated multipliers were integrated in the core of a state-of-the-art logic synthesis tool, leading to 1.98% area and 0.54% WNS reductions, post place and route, on designs specialized in performing AI tasks.