Exploring B+-Tree Implementations Using Scratchpad Memory

Energy-efficient accelerators consisting of processors equipped with scratchpad memory (SPM) are attracting attention. UPMEM is one such accelerator. It adopts the processing-in-memory approach, embedding processors in each memory bank and chip to form a large number of computing units called DPUs. Each DPU has SPM and its own DRAM for main memory. DRAM can only be accessed via DMA, which transfers multiples of 8 bytes of data.

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Published
2025-10-09
DOI
https://doi.org/10.1145/3725783.3764412
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
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article

Exploring B+-Tree Implementations Using Scratchpad Memory

Tomoharu Ugawa, Takato Hideshima
Parallel Computing and Optimization Techniques
article

Exploring B+-Tree Implementations Using Scratchpad Memory

Tomoharu Ugawa, Takato Hideshima
article en

Abstract

Energy-efficient accelerators consisting of processors equipped with scratchpad memory (SPM) are attracting attention. UPMEM is one such accelerator. It adopts the processing-in-memory approach, embedding processors in each memory bank and chip to form a large number of computing units called DPUs. Each DPU has SPM and its own DRAM for main memory. DRAM can only be accessed via DMA, which transfers multiples of 8 bytes of data.

The University of Tokyo (JP)
Openalex Percentile: Top 69%
Parallel Computing and Optimization Techniques
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Exploring B+-Tree Implementations Using Scratchpad Memory — Tomoharu Ugawa, Takato Hideshima · (2025) | TGRS Research Map | TGRS