Co-operative JIT Compilation for Resource-Constrained Low-Power Coprocessors

As IoT devices evolve, their microcontroller systems-on-a-chip (SoCs) require higher performance, larger memory, and richer peripherals, resulting in increased power consumption. Integrating low-power (LP) coprocessors into SoCs offers a means to reduce power usage while preserving responsiveness, particularly in sensing tasks. However, LP coprocessors face memory capacity limitations and require complex, platform-specific development. These constraints often necessitate application refactoring and careful coordination of inter-processor communication.