Novel Supervisor-Based Architecture for Logic Controller Design

This paper presents a novel supervisor-based architecture for designing a reliable logic controller, which integrates the cyclic operation of programmable logic controllers (PLCs) with the formal advantages of supervisory control theory (SCT). By combining these two paradigms, this architecture delivers a comprehensive approach to control and monitoring, overcoming the inherent challenges associated with synchronization issues. Through abstractions in task modeling, sensor integration, and constraint handling, this integrated framework resolves complexities, ensuring seamless interaction between control and monitoring processes. A proof-of-concept is presented, demonstrating the effectiveness of this integrated approach in a real-world context.

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Publication Details

Journal
IFAC-PapersOnLine
Published
2025-01-01
DOI
https://doi.org/10.1016/j.ifacol.2025.09.498
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
0.00
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article

Novel Supervisor-Based Architecture for Logic Controller Design

Bernard Riera, Ramla Saddem, David Annebicque, Dimitri Renard
IFAC-PapersOnLine
VLSI and Analog Circuit Testing
article

Novel Supervisor-Based Architecture for Logic Controller Design

Bernard Riera, Ramla Saddem, David Annebicque, Dimitri Renard
article en

Abstract

This paper presents a novel supervisor-based architecture for designing a reliable logic controller, which integrates the cyclic operation of programmable logic controllers (PLCs) with the formal advantages of supervisory control theory (SCT). By combining these two paradigms, this architecture delivers a comprehensive approach to control and monitoring, overcoming the inherent challenges associated with synchronization issues. Through abstractions in task modeling, sensor integration, and constraint handling, this integrated framework resolves complexities, ensuring seamless interaction between control and monitoring processes. A proof-of-concept is presented, demonstrating the effectiveness of this integrated approach in a real-world context.

IFAC-PapersOnLineVol. 59(10)
Centre de Recherche en Sciences et Technologies de l'Information et de la Communication (FR), Université Polytechnique Hauts-de-France (FR), Université de Reims Champagne-Ardenne (FR)
Openalex Percentile: Top 69%
VLSI and Analog Circuit Testing
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Novel Supervisor-Based Architecture for Logic Controller Design — Bernard Riera, Ramla Saddem, et al. · IFAC-PapersOnLine (2025) | TGRS Research Map | TGRS