Experimental Validation of a PMU Prototype Resilient Against DC Offsets and with Attenuated Self-Interference

This paper presents the development of a PMU prototype based on a synchrophasor estimation (SE) technique previously developed by the authors, i.e. the DCSOGI-IpDFT. This SE algorithm is characterized by the rejection of static DC offsets and an inherent attenuation of the self-interference of the fundamental tone. The resulting device, deployed in an industry-grade platform, shows compliance with the most demanding requirements for both P an M PMU performance classes at once. This compliance is assessed using a comprehensive experimental validation testbed where all test conditions of the IEC/IEEE 60255-118-1-2018 standard, additionally superposed with a 10% static DC offset, are replicated by means of a state-of-the-art PMU calibrator. Furthermore, it is experimentally proven the ability of the PMU to meet the standard requirements for harmonically distorted signals even when affected by multiple simultaneous harmonic tones on top of a DC offset and operating under off-nominal frequency conditions.