MiniBRNN: A Low-Resource Inference Processor for Binary-Weight Recurrent Neural Networks Based on Speculative Operation Pruning and Interleaved Thread Scheduling

With the growing demand for efficient deployment of deep learning models on resource-constrained devices, designing neural network processors that balance performance, resource usage, and speed has become a critical challenge. In this context, an efficient low-resource inference processor for recurrent neural networks (RNNs) is presented. The RNN models are quantized, representing each weight by a single bit with a power-of-two magnitude. The inference process is performed on a per-lane basis to reduce resource usage, with speculative pruning of some operations to increase speed. The microarchitecture is designed to execute threads across lanes using an interleaved scheduling, enhancing efficiency. The functionality of the proposed processor is verified under a fully-integrated FPGA-based inference system. For the Penn Treebank task with a binary-weight long short-term memory model, the proposed processor achieves a perplexity of 72.19, which is close to the quality result without pruning, while achieving a 1.56× speedup through pruning. The LUT resource usage is as low as 1.44k, with an efficiency of 2.415 step/s/LUT.

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Publication Details

Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Published
2025-01-01
DOI
https://doi.org/10.1109/tcad.2025.3619469
Primary Topic
Neural Networks and Applications
Type
article
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article

MiniBRNN: A Low-Resource Inference Processor for Binary-Weight Recurrent Neural Networks Based on Speculative Operation Pruning and Interleaved Thread Scheduling

Jun-Hyung Lee, Tae‐Hwan Kim, Seon-Hee Oh
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Neural Networks and Applications
article

MiniBRNN: A Low-Resource Inference Processor for Binary-Weight Recurrent Neural Networks Based on Speculative Operation Pruning and Interleaved Thread Scheduling

Jun-Hyung Lee, Tae‐Hwan Kim, Seon-Hee Oh
article en

Abstract

With the growing demand for efficient deployment of deep learning models on resource-constrained devices, designing neural network processors that balance performance, resource usage, and speed has become a critical challenge. In this context, an efficient low-resource inference processor for recurrent neural networks (RNNs) is presented. The RNN models are quantized, representing each weight by a single bit with a power-of-two magnitude. The inference process is performed on a per-lane basis to reduce resource usage, with speculative pruning of some operations to increase speed. The microarchitecture is designed to execute threads across lanes using an interleaved scheduling, enhancing efficiency. The functionality of the proposed processor is verified under a fully-integrated FPGA-based inference system. For the Penn Treebank task with a binary-weight long short-term memory model, the proposed processor achieves a perplexity of 72.19, which is close to the quality result without pruning, while achieving a 1.56× speedup through pruning. The LUT resource usage is as low as 1.44k, with an efficiency of 2.415 step/s/LUT.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Korea Aerospace University (KR)
Openalex Percentile: Top 85%
Neural Networks and Applications
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MiniBRNN: A Low-Resource Inference Processor for Binary-Weight Recurrent Neural Networks Based on Speculative Operation Pruning and Interleaved Thread Scheduling — Jun-Hyung Lee, Tae‐Hwan Kim, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2025) | TGRS Research Map | TGRS