Small-Gain Based Filter Design for Accurate and Stable P-HIL in Power Converter Testing Under Grid Faults

Power hardware-in-the-loop (P-HIL) enables the testing of power converters under realistic scenarios, including fault conditions. However, the naturally coupled system (NCS) exhibits an amplification in high-frequency region. As a consequence, the P-HIL system becomes unstable due to the effects of the delays introduced by the power amplifier (PA) and digital real-time simulator (DRTS). In this regard, one solution proposed in the literature is the use of a low-pass filter (LPF) to stabilize the loop. However, proper tuning of LPF bandwidth is essential to meet a balance between P-HIL system’s stability and accuracy. In fact, while an increased LPF bandwidth enhances accuracy, it can degrade its stability performance. Additionally, in the case of P-HIL testing under asymmetrical grid faults, the multiple-input multiple-output (MIMO) nature of the system must be considered during grid fault P-HIL testing, as traditional single-input single-output (SISO) modeling may be inadequate for accuracy and stability analysis.This paper proposes an LPF design based on stability analysis using the small-gain theorem for MIMO based P-HIL testing in faulty grid scenarios. It explores various LPF designs to enhance accuracy while ensuring P-HIL stability. The findings, derived from Matlab/Simulink analysis, are validated through simulation-based investigations.