A 12-bit 100 MSPS Full-Swing Current-Steering Digital-to-Analog Converter with Half-Power Supply Calibration Technique

We present a digital-to-analog converter (DAC) with full-swing DAC output and a proposed half-power supply calibration technique. To generate a full-swing DAC output, symmetric thermometer decoders and an output selector are implemented to select the appropriate current cell according to the output voltage range. Furthermore, to improve the linearity, we propose a half-power supply calibration circuit consisting of comparators and calibration counters to control the current of the current cells at the half-power supply voltage point, where the voltage mismatch typically occurs. The DAC was fabricated in a 28 nm CMOS process, with a full chip area of 0.95 mm × 0.93 mm. The measurement results demonstrate a maximum voltage mismatch improvement of 95% when using the proposed half-power supply calibration technique, with DNL and INL values of 0.39 and 1.15 LSB. The total power consumption was 73.8 mW at 100 MSPS, with analog and digital supply voltages of 1.8 and 1.0 V, respectively.

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Publication Details

Journal
Electronics
Published
2025-10-08
DOI
https://doi.org/10.3390/electronics14193955
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

A 12-bit 100 MSPS Full-Swing Current-Steering Digital-to-Analog Converter with Half-Power Supply Calibration Technique

Myung-Sik Kim, Kwangjin Park, Soo Youn Kim, Hyun-Jin Song et al.
Electronics
Analog and Mixed-Signal Circuit Design
article

A 12-bit 100 MSPS Full-Swing Current-Steering Digital-to-Analog Converter with Half-Power Supply Calibration Technique

Myung-Sik Kim, Kwangjin Park, Soo Youn Kim, Hyun-Jin Song, Minkyu Song, Jintae Kim, Seok Gyu Choi
article en

Abstract

We present a digital-to-analog converter (DAC) with full-swing DAC output and a proposed half-power supply calibration technique. To generate a full-swing DAC output, symmetric thermometer decoders and an output selector are implemented to select the appropriate current cell according to the output voltage range. Furthermore, to improve the linearity, we propose a half-power supply calibration circuit consisting of comparators and calibration counters to control the current of the current cells at the half-power supply voltage point, where the voltage mismatch typically occurs. The DAC was fabricated in a 28 nm CMOS process, with a full chip area of 0.95 mm × 0.93 mm. The measurement results demonstrate a maximum voltage mismatch improvement of 95% when using the proposed half-power supply calibration technique, with DNL and INL values of 0.39 and 1.15 LSB. The total power consumption was 73.8 mW at 100 MSPS, with analog and digital supply voltages of 1.8 and 1.0 V, respectively.

ElectronicsVol. 14(19)
Dongguk University (KR)
Openalex Percentile: Top 73%
Analog and Mixed-Signal Circuit Design
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