Implementation of a TRNG Architecture based on Different Entropy Sources

In this paper, a true random number generator (TRNG) architecture is developed by utilizing different entropy sources such as Thermal noise, Metastability, and Timing Jitter. Thermal noise is generated by connecting the base and collector terminal of two BC547 transistors, timing Jitter is generated by using the All-Digital Phase Locked Loop (ADPLL), and Metastability is generated by using a DFF. The thermal noise source uses IC741 OPAMP-based amplifier and comparator circuits to obtain digital data, and it is developed on a separate breadboard. Metastability and timing Jitter sources were developed using an Artix 7 FPGA to obtain digital data. XOR operations were performed on digital data obtained from thermal noise and Metastability and timing Jitter sources to obtain random bitstream. Pure random bitstreams consisting of more than 24000 bits were generated by performing sampling using a DFF. Analog Discovery was used to provide an input source for the amplifier circuit and to show the output waveform of the comparator circuit. Tera Term was used to display bitstream on the monitor using a UART transmitter. The proposed TRNG utilizes 147 LUTs and 106FFs and achieves a throughput value of 299.13 Mbps.