Investigation of MOSFET Transistor Reliability under Pulsed-RF Life Tests

This paper presents a novel reliability life test bench designed especially for lifetime tests under pulse conditions on high RF power devices. Investigations are conducted into the monitoring of RF power, drain, gate, and current voltages and currents under varied temperature and pulse conditions. On a specialized RF S-band test bench, a 3000-hour pulsed radiofrequency life test has been carried out in operational modes. Following these accelerated ageing tests, the data treatment yielded investigation findings regarding degradations of critical electrical parameters, which are presented. In order to stress the Lateral-Diffused Metal Oxide Semiconductor (LDMOS), many duty cycles are applied. It demonstrates that hot carriers-generated interface states (traps) and trapped carriers are related to the dominant degradation phenomenon through tracking of a set of RF parameters (Pout, Gain, and Drain Efficiency: DE).

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Publication Details

Journal
WSEAS TRANSACTIONS ON ELECTRONICS
Published
2025-10-07
DOI
https://doi.org/10.37394/232017.2025.16.15
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
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article

Investigation of MOSFET Transistor Reliability under Pulsed-RF Life Tests

Ahmed Almusallam, M.A. Belaïd
WSEAS TRANSACTIONS ON ELECTRONICS
Integrated Circuits and Semiconductor Failure Analysis
article

Investigation of MOSFET Transistor Reliability under Pulsed-RF Life Tests

Ahmed Almusallam, M.A. Belaïd
article en

Abstract

This paper presents a novel reliability life test bench designed especially for lifetime tests under pulse conditions on high RF power devices. Investigations are conducted into the monitoring of RF power, drain, gate, and current voltages and currents under varied temperature and pulse conditions. On a specialized RF S-band test bench, a 3000-hour pulsed radiofrequency life test has been carried out in operational modes. Following these accelerated ageing tests, the data treatment yielded investigation findings regarding degradations of critical electrical parameters, which are presented. In order to stress the Lateral-Diffused Metal Oxide Semiconductor (LDMOS), many duty cycles are applied. It demonstrates that hot carriers-generated interface states (traps) and trapped carriers are related to the dominant degradation phenomenon through tracking of a set of RF parameters (Pout, Gain, and Drain Efficiency: DE).

WSEAS TRANSACTIONS ON ELECTRONICSVol. 16
Umm al-Qura University (SA), University of Sousse (TN)
Openalex Percentile: Top 72%
Integrated Circuits and Semiconductor Failure Analysis
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Investigation of MOSFET Transistor Reliability under Pulsed-RF Life Tests — Ahmed Almusallam, M.A. Belaïd · WSEAS TRANSACTIONS ON ELECTRONICS (2025) | TGRS Research Map | TGRS