Analysis of Planar and SBD-Embedded SiC MOSFET Under Avalanche Stress

In this paper, Commercial Planar and SBD-Embedded MOSFETs are studied under Avalanche stress. After screening the devices with threshold voltage, unclamped inductive switching tests are carried out to evaluate avalanche reliability of the devices. SBD-Embedded MOSFETs can only endure 27.1% current of the counterpart. The experimental results are analyzed by TCAD simulation that avalanche failure mechanism in SBD-Embedded MOSFET is closely related to the Schottky barrier diode embedded region. Transient TCAD simulations uncover localized heating at the Schottky contact region during avalanche, exacerbated by current-path competition between the MOSFET channel, body diode, and SBD during turn-off. The results highlight a fundamental tradeoff between static efficiency gains from SBD integration and dynamic ruggedness boundary for further application.