Analysis and compensation method of transient unbalanced current in parallel connection of SiC MOSFET

This paper proposes a comprehensive solution to the problem of transient current imbalance caused by chip parameter mismatch and package parasitic parameter coupling in parallel operation of silicon carbide (SiC) MOSFET. First, by analyzing the nonlinear characteristics of threshold voltage (V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf>) and transconductance (g<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">fs</inf>), a chip screening method based on cubic polynomial fitting is established, which significantly reduces the influence of parameter dispersion on dynamic current sharing. Secondly, a mathematical model of multi-chip parallel connection of inductance and circuit layout is constructed, revealing the mechanism of mutual inductance effect aggravating unbalanced current under the discrete layout of drain bus and power source bus. Finally, a branch impedance compensation method is proposed. By adding compensation on the source side, the common branch impedance coupling and mutual inductance effect are suppressed, and the reliability of the parallel system is significantly improved.