Study on 4H-SiC Trench Gate Dual-Mode Composite Transistors (T-DCT) Structure to reduce R<sub>on</sub> and Enhance SCWT
In order to solve of high specific on-resistance and limited short-circuit withstand capability of conventional 4H-SiC Vertical U-groove MOSFET (VUMOS), a Trench-gate Dual-mode Composited Transistor (T-DCT) structure with VUMOS and BJT in parallel is proposed. The static characteristics, switching behavior, and short-circuit robustness of the T-DCT are systematically evaluated by TCAD and compared with that of VUMOS. Simulation results show that the T-DCT achieves a 50% reduction in Ron while exhibiting enhanced short-circuit withstand time (SCWT) of 7.0μs, a 29.6% improvement compared to the 5.4μs SCWT of the VUMOS.
Authors
- Cailin Wang (ORCID: https://orcid.org/0000-0001-7708-5362)
- Lei Guan (ORCID: https://orcid.org/0009-0006-6293-1232)
- Wenyu Xi
Institutions
- Xi'an University of Science and Technology (CN)
- Xi'an University of Technology (CN)
Publication Details
- Published
- 2025-08-15
- DOI
- https://doi.org/10.1109/wipda-asia63772.2025.11183883
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00