Super-Junction IGBT with Adaptive Hole Channel around Stepped Trench Gate for Low On-State Voltage and Low Turn-Off Loss

This paper presents a novel super-junction insulated gate bipolar transistor (SJ-IGBT) with an adaptive hole channel around the stepped trench gate. During on-state operation, the hole channel is off due to the potential barrier caused by the positive gate bias. As a result, hole extraction from the drift region is effectively suppressed. Conductance modulation in both the n-pillar and p-pillar regions are enhanced. And hence, the on-state voltage (V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>) can be largely reduced. During the turn-off transient, the hole channel is on as the gate bias is at a low level. As a result, the hole channel region facilitates rapid extraction of holes from the P-pillar, which leads to shorter turn-off time and reduced turn-off loss (E<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf>). The performance of the proposed SJ-IGBT and conventional super-junction IGBT structures are studied and compared through TCAD simulation. The results show that the trade-off between V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf> and E<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> have been significantly improved. In addition, this paper analyzes the internal depletion region variation during turn-off and components of turn-off loss of SJ-IGBT.