Comparative Investigation of Gate Oxide Degradation in 1.2 kV Planar, Double-Trench, and Asymmetric-Trench SiC MOSFETs

SiO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> is commonly employed as the gate-oxide material in SiC MOSFETs, but its tendency to degrade poses a significant challenge to device reliability. Therefore, monitoring the gate oxide’s condition is crucial. Many degradation precursors are influenced by junction temperature, suggesting that a composite indicator combining threshold voltage and transconductance may offer a more dependable metric. However, most existing research concentrates on conventional planar and trench gate designs, leaving the comparative analysis of planar, double-trench, and asymmetric-trench SiC MOSFETs largely unexplored. This study systematically evaluates the three structures and analyzes the shift characteristics of their transconductance and threshold voltage. The findings serve as a reference for understanding the degradation characteristics of various gate structures during gate oxide aging, thereby allowing for more accurate assessments of gate oxide reliability.