Chip Screening Strategy for SiC MOSFET Based on Simulated Annealing Algorithm

This paper studies the spread of key electrical parameters of Silicon Carbide (SiC) MOSFETs and its effect on the parallel current sharing of the devices. This paper proposes a screening method for parallel SiC MOSFETs based on the simulated annealing algorithm. Compared with traditional methods, this screening method can significantly reduce the current imbalance degree of parallel devices and narrow the difference in switching losses. The imbalance degree of the turn-on loss is 29.7%, while after optimization, the imbalance degree of the turn-on loss is only 7.5%. This paper aims to provide guidelines on device screening for paralleling SiC MOSFETs.