A Study of Multi-Chip Carrier Structure for SiC PCB-Embedded Power Module
This work proposes a new chip carrier structure to enable the integration of multiple chips. Compared with the solution proposed by Schweizer, the new structure significantly reduces size of PCB embedded power module. To evaluate the proposed concept, a power module was created. Based on this module, the performance differences of by using of single-chip and multi-chip carrier were evaluated in terms of the size, thermal resistance, power loop inductance, and current balancing. Meanwhile, the effect of chip distance in multi-chip carrier on the above performance is also systematically analyzed to find out a balance between electrical preparties and thermal management. This multi-chip carrier is investigated to provide a practical reference for the development of compact and high-performance PCB-embedded power modules.
Authors
- Mingfu Li (ORCID: https://orcid.org/0000-0002-4812-8244)
- Xiong Yang (ORCID: https://orcid.org/0000-0002-8275-3182)
- Xuelun Zhang
- Zhiyue Shi (ORCID: https://orcid.org/0000-0001-8351-1882)
- Ye Zhu (ORCID: https://orcid.org/0000-0001-8369-0294)
- Yongmei Pan (ORCID: https://orcid.org/0009-0004-5109-4817)
- Jiajun Lai
- Min Chen (ORCID: https://orcid.org/0000-0002-7661-2455)
- Hao Sun
- Xunjin Xu
Institutions
- China Mobile (China) (CN)
- Zhejiang University (CN)
- United Microelectronics (United States) (US)
Publication Details
- Published
- 2025-08-15
- DOI
- https://doi.org/10.1109/wipda-asia63772.2025.11183940
- Primary Topic
- Internet of Things and Social Network Interactions
- Type
- article
- Field-Weighted Citation Impact
- 0.00