Evaluating FPGA Acceleration with Intel ® oneAPI Toolkit for High-Speed Data Processing

The LHCb Experiment employs GPU cards in its first level trigger system to enhance computing efficiency, achieving a data rate of 32 Tb/s from the detector. GPUs were selected for their computational power, parallel processing capabilities, and adaptability. However, trigger tasks necessitate extensive combinatorial and bitwise operations, ideally suited for FPGA implementation. Yet, FPGA adoption for compute acceleration is hindered by steep learning curves and very different programming paradigms with respect to GPUs and CPUs. In the last few years, interest in high level synthesis has grown because of the possibility of developing FPGA gateware in higher-level languages. This study assesses the Intel® oneAPI FPGA Toolkit, which aims to simplify the development of FPGA-accelerated workloads by offering a GPU-like programming framework. We detail the integration of a portion of the current pixel clustering algorithm into oneAPI, address common implementation challenges, and compare it against CPU, GPU, and RTL implementations. Our findings showcase promising outcomes for this emerging technology, potentially facilitating the repurposing of FPGAs in the data acquisition system as compute accelerators during idle data-taking periods.

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Publication Details

Journal
EPJ Web of Conferences
Published
2025-01-01
DOI
https://doi.org/10.1051/epjconf/202533701070
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
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article

Evaluating FPGA Acceleration with Intel ® oneAPI Toolkit for High-Speed Data Processing

F. Pisani, P. Durante, Alberto Perro, Eleni Xochelli
EPJ Web of Conferences
Embedded Systems Design Techniques
article

Evaluating FPGA Acceleration with Intel ® oneAPI Toolkit for High-Speed Data Processing

F. Pisani, P. Durante, Alberto Perro, Eleni Xochelli
article en

Abstract

The LHCb Experiment employs GPU cards in its first level trigger system to enhance computing efficiency, achieving a data rate of 32 Tb/s from the detector. GPUs were selected for their computational power, parallel processing capabilities, and adaptability. However, trigger tasks necessitate extensive combinatorial and bitwise operations, ideally suited for FPGA implementation. Yet, FPGA adoption for compute acceleration is hindered by steep learning curves and very different programming paradigms with respect to GPUs and CPUs. In the last few years, interest in high level synthesis has grown because of the possibility of developing FPGA gateware in higher-level languages. This study assesses the Intel® oneAPI FPGA Toolkit, which aims to simplify the development of FPGA-accelerated workloads by offering a GPU-like programming framework. We detail the integration of a portion of the current pixel clustering algorithm into oneAPI, address common implementation challenges, and compare it against CPU, GPU, and RTL implementations. Our findings showcase promising outcomes for this emerging technology, potentially facilitating the repurposing of FPGAs in the data acquisition system as compute accelerators during idle data-taking periods.

EPJ Web of ConferencesVol. 337
Centre National de la Recherche Scientifique (FR), University of Thessaly (GR), Aix-Marseille Université (FR), Centre de physique des particules de Marseille (FR), European Organization for Nuclear Research (CH)
Openalex Percentile: Top 70%
Embedded Systems Design Techniques
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Evaluating FPGA Acceleration with Intel ® oneAPI Toolkit for High-Speed Data Processing — F. Pisani, P. Durante, et al. · EPJ Web of Conferences (2025) | TGRS Research Map | TGRS