Analisis Pengaruh Variasi Duty Cycle terhadap Karakteristik Tegangan Output dan Ripple pada Buck Converter Menggunakan Simulasi MATLAB

The use of buck converters as DC step-down voltage regulators is increasingly important in various power electronics applications. However, the quality of the output voltage is often disturbed by the presence of ripple, which is influenced by variations in the duty cycle. This study aims to analyze the effect of duty cycle variations on the output voltage and ripple of a buck converter using MATLAB/Simulink simulation. The method used is quantitative simulation by varying the duty cycle from 10% to 90% in a buck converter circuit with fixed parameters: input voltage 30 V, switching frequency 40 kHz, inductor 176.25 μH, and capacitor 44.33 μF. The simulation results show that the output voltage is proportional to the duty cycle, increasing from 3.245 V at D=10% to 26.82 V at D=90%. The highest ripple occurred at D=40% with a value of 0.07 V, while the lowest ripple was at D=50% with a value of 0.0003 V. These findings indicate the existence of an optimal operating point where the system works most stably. This study provides practical guidance in designing efficient and stable buck converters for applications such as battery charging and renewable energy systems.