Recent Progress in Sub‐10 Nm Nanofabrication for Scaling Down 2D Transistors (Adv. Electron. Mater. 16/2025)
Two-Dimensional Transistors This cover depicts a sub-10nm channel 2D-FET on a silicon wafer, reflecting wafer-scale nanofabrication of ultra-scaled 2D-FETs. It showcases precise nanolithography, uniform arrays, and CMOS-compatible technology. More information can be found in the Review Article by Dianyu Qi and co-workers (10.1002/aelm.202500306).
Authors
- Haichuan Li (ORCID: https://orcid.org/0000-0002-9974-8072)
- Dawei Gao
- Dianyu Qi (ORCID: https://orcid.org/0000-0003-2912-9388)
- Yongyu Wu
- Kai Xu (ORCID: https://orcid.org/0000-0003-3837-7922)
- Kun Ren
Institutions
- Zhejiang University of Science and Technology (CN)
- Zhejiang University of Technology (CN)
- Zhejiang University (CN)
Publication Details
- Journal
- Advanced Electronic Materials
- Published
- 2025-10-01
- DOI
- https://doi.org/10.1002/aelm.70103
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00