Hardware support for contention tracking in CPU and GPU last-level cache

Modern MPSoCs increasingly rely on resource utilization to improve application performance with different computation needs. The last-level cache (LLC) is one of the main shared resources, contributing to the improvement of aggregated performance. However, LLC sharing also increases individual application performance variability, which is undesirable in scenarios where performance guarantees are required. While deploying cache partitioning mechanisms allows regaining predictability, they negatively affect aggregated performance. This confronts system designers with the dire conundrum of choosing between aggregated performance and predictability. We contend that adding hardware support to track contention among tasks (kernels) in the LLC enables it to be shared, removing shortcomings brought by partitioning while providing a clear view of how tasks (kernels) affect each other in the LLC of the CPUs and GPUs. This approach enables achieving the desired balance between performance and predictability. Thus, we propose a low-overhead hardware mechanism, called demotion counters (DC), that tightly estimates the contention tasks (kernels) generate on each other in the shared LLC, outperforming other solutions that build on existing hardware contention-tracking proposals which suffer an average workload breakdown deviation (wbd) over 0.13. Our results also show that DC introduces 0.66% area overhead.

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Publication Details

Journal
Journal of Systems Architecture
Published
2025-10-04
DOI
https://doi.org/10.1016/j.sysarc.2025.103591
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
Field-Weighted Citation Impact
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article

Hardware support for contention tracking in CPU and GPU last-level cache

Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla, Hamid Tabani et al.
Journal of Systems Architecture
Parallel Computing and Optimization Techniques
article

Hardware support for contention tracking in CPU and GPU last-level cache

Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla, Hamid Tabani, Javier Barrera
article en

Abstract

Modern MPSoCs increasingly rely on resource utilization to improve application performance with different computation needs. The last-level cache (LLC) is one of the main shared resources, contributing to the improvement of aggregated performance. However, LLC sharing also increases individual application performance variability, which is undesirable in scenarios where performance guarantees are required. While deploying cache partitioning mechanisms allows regaining predictability, they negatively affect aggregated performance. This confronts system designers with the dire conundrum of choosing between aggregated performance and predictability. We contend that adding hardware support to track contention among tasks (kernels) in the LLC enables it to be shared, removing shortcomings brought by partitioning while providing a clear view of how tasks (kernels) affect each other in the LLC of the CPUs and GPUs. This approach enables achieving the desired balance between performance and predictability. Thus, we propose a low-overhead hardware mechanism, called demotion counters (DC), that tightly estimates the contention tasks (kernels) generate on each other in the shared LLC, outperforming other solutions that build on existing hardware contention-tracking proposals which suffer an average workload breakdown deviation (wbd) over 0.13. Our results also show that DC introduces 0.66% area overhead.

Journal of Systems ArchitectureVol. 169
Openalex Percentile: Top 70%
Parallel Computing and Optimization Techniques
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