Synthesis of a Ternary Two-Bit Counter Based on Ternary T-Triggers

The purpose of this article is to study the possibilities of using ternary logic in digital devices by developing and synthesizing a two-bit ternary counter based on asynchronous ternary T-triggers. The author seeks to prove the effectiveness and feasibility of the transition from traditional binary logic to multivalued calculus systems, in particular ternary, by creating a workable hardware implementation capable of stable cyclic switching of logical states in a symmetric ternary number system. In this paper, we provide an analytical review of the current state of development of ternary logic, consider its advantages and disadvantages, and describe the problems of synthesizing logical functions in the ternary environment. Based on the existing approaches, a ternary asynchronous T-trigger was designed using bipolar threshold elements of multivalued logic (BETL), emitter repeaters, and current switches. The proposed architecture allows to realize switching between three logical states (-1, 0, +1) with a high level of reliability. Truth tables for both a separate trigger and a two-bit ternary counter operating on its basis have been developed. This counter covers nine states, which corresponds to the numbers from 0 to 8 in decimal. The paper also provides detailed block diagrams of both the trigger and the counter, which provide a visual representation of the logic of the device. As a result of the study, we have proved the operability of the proposed technical solution, its potential efficiency in comparison with binary analogs, as well as the prospects for further implementation in digital systems. The obtained results demonstrate the feasibility of using ternary logic to build compact and energy-efficient logic elements of a new generation. In further research, the author sees the need to develop synchronous ternary circuits, expand the bit capacity of counters, and model the operation of the proposed devices in CAD environments to ensure practical use in modern digital systems.

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Publication Details

Journal
Central Ukrainian Scientific Bulletin Technical Sciences
Published
2025-01-01
DOI
https://doi.org/10.32515/2664-262x.2025.12(43).1.73-79
Primary Topic
Photonic and Optical Devices
Type
article
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article

Synthesis of a Ternary Two-Bit Counter Based on Ternary T-Triggers

Larysa Martynovych, Timur Yefimenko
Central Ukrainian Scientific Bulletin Technical Sciences
Photonic and Optical Devices
article

Synthesis of a Ternary Two-Bit Counter Based on Ternary T-Triggers

Larysa Martynovych, Timur Yefimenko
article en

Abstract

The purpose of this article is to study the possibilities of using ternary logic in digital devices by developing and synthesizing a two-bit ternary counter based on asynchronous ternary T-triggers. The author seeks to prove the effectiveness and feasibility of the transition from traditional binary logic to multivalued calculus systems, in particular ternary, by creating a workable hardware implementation capable of stable cyclic switching of logical states in a symmetric ternary number system. In this paper, we provide an analytical review of the current state of development of ternary logic, consider its advantages and disadvantages, and describe the problems of synthesizing logical functions in the ternary environment. Based on the existing approaches, a ternary asynchronous T-trigger was designed using bipolar threshold elements of multivalued logic (BETL), emitter repeaters, and current switches. The proposed architecture allows to realize switching between three logical states (-1, 0, +1) with a high level of reliability. Truth tables for both a separate trigger and a two-bit ternary counter operating on its basis have been developed. This counter covers nine states, which corresponds to the numbers from 0 to 8 in decimal. The paper also provides detailed block diagrams of both the trigger and the counter, which provide a visual representation of the logic of the device. As a result of the study, we have proved the operability of the proposed technical solution, its potential efficiency in comparison with binary analogs, as well as the prospects for further implementation in digital systems. The obtained results demonstrate the feasibility of using ternary logic to build compact and energy-efficient logic elements of a new generation. In further research, the author sees the need to develop synchronous ternary circuits, expand the bit capacity of counters, and model the operation of the proposed devices in CAD environments to ensure practical use in modern digital systems.

Central Ukrainian Scientific Bulletin Technical SciencesVol. 1(12(43))
Openalex Percentile: Top 73%
Photonic and Optical Devices
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Synthesis of a Ternary Two-Bit Counter Based on Ternary T-Triggers — Larysa Martynovych, Timur Yefimenko · Central Ukrainian Scientific Bulletin Technical Sciences (2025) | TGRS Research Map | TGRS