A Second-Order Discrete-Time Sigma-Delta Modulator for IoT Applications in 22nm CMOS

Sigma-Delta modulators (SDM) are one of the best choices for the implementation of analog/digital interfaces on CMOS integrated technologies. Most of Internet of Things (IoT) applications requires from 12 up to 15 bits of resolution, making SDMs suitable for this kind of application. This work implements a second-order discrete-time (DT) cascade of integrators with feed forward summation (CIFF) sigma-delta modulator with an operational amplifier with adaptative bias and DC gain enhancement. The SDM is implemented for IoT applications using 22 nm process with 2.5 V power supply. Considering noise at schematic level, the designed DT-SDM achieved a peak SNR/SNDR of 74.48 dB, or an effective number of bits (ENOB) of 12.74 bits, a total power consumption of $264.2 \mu \mathrm{~W}$, and achieved a Schreier’s figure-of-merit of 142.6 dB. The designed DT-SDM achieves high resolution and it is suitable for IoT applications.