Descriptor: Physical Design Database (PDB)

The Physical Design Database (PDB) introduces a collection of physical circuit designs and associated metadata to advance optimization research on the chip development process. This comprehensive dataset comprises various circuit prototypes, ranging in complexity and scale, and spans multiple technology process nodes, enabling diverse use cases and applications. Each entry in the database consists of a physical layout in widely used GDSII or DEF formats, along with detailed metadata that covers instance, verification, and performance-power-area (PPA) metrics. The PDB also provides a suite of tools, including an automated layout generator, for efficiently generating layouts and metadata directly from Register Transistor Level (RTL) designs. This resource is intended to facilitate performance optimization, assist in developing layout generation tools, and serve as a benchmark for analyzing and evaluating physical layouts. By providing a uniform structure for layout data, the PDB enables researchers to optimize circuits more effectively, supporting the development of more efficient layout generation methodologies and promoting advances in semiconductor design and manufacturing.