Control Strategy for Voltage Disturbance Compensation and Power Factor Correction With On‐Site Short‐Circuit Level Calculation Using Grid‐Following Inverter

ABSTRACT The occurrence of voltage variations caused by the input/output of large loads and/or transmission lines, as well as faults and high levels of photovoltaic‐based distributed energy resource (DER) penetration, impairs power quality indicators at the power grid and causes financial losses for industrial consumers. In industrial electrical systems, knowing the short‐circuit level (SCL) at the point of common coupling (PCC), the relationship between the SCL and the desired reactive power can be used to define the capability of an existing inverter‐based DER for voltage compensation under conditions of SAG or SWELL. In this context, this article presents a proposal of ‘control strategy for voltage disturbance compensation and power factor correction with on‐site short circuit level calculation’ (CS‐VDCPFC‐SCLC) using grid‐following inverter. The main contribution is the identification of the situations in which an ordinary grid‐following (GFL) photovoltaic (PV) Inverter can or cannot be used for voltage compensation at the PCC, avoiding the use of the PV system to provide reactive power in cases where voltage compensation will not be possible. If the voltage at the PCC cannot be compensated, the CS‐VDCPFC‐SCLC can inject or absorb the exact amount of reactive power demanded by the local load to adjust the power factor, hence, avoiding the use of capacitor banks, synchronous compensators, thyristor reactors and/or static compensators (STATCOM). In order to validate the proposed control technique with an advanced method for the design of power electronics components, a controller hardware‐in‐the‐loop (C‐HIL) setup is employed. Results are provided and demonstrate the effectiveness and feasibility of the proposed solution. A 3.0 kW laboratory prototype was also built and analysed.