TCAD analysis of Si/SiGe superlattice channel in 2 nm gate-all-around FETs
Abstract In this work, Si/SiGe superlattice (SL) structures are introduced as channel materials in gate-all-around field-effect transistors (FETs) targeting the 2 nm technology node, and their performance is systematically benchmarked against that of conventional Si channel devices. Device design and performance analysis were conducted using Sentaurus technology computer-aided design (TCAD). To investigate the impact of different Si and SiGe layer thickness combinations in SL channels, nine different Si/SiGe SL configurations were considered. Simulation results indicate that compared with conventional Si channels SL channels can significantly enhance the drive current, ON–OFF current ratio ( I ON / I OFF ) and maximum transconductance, while effectively reducing the off-state current ( I OFF ), subthreshold swing and drain-induced barrier lowering. These improvements demonstrate superior suppression of short-channel effects, and device performance can be further optimized by adjusting the thicknesses of the Si and SiGe layers. Overall, the proposed Si/SiGe SL channel shows strong potential for application in advanced 2 nm technology nodes.
Authors
- Po-Ying Li
- Yue Peng (ORCID: https://orcid.org/0000-0001-5941-5276)
- Chia-Huai Ho
- G. Y. Wu (ORCID: https://orcid.org/0000-0001-5544-3560)
- Shun-Jung Chaing
- Ching-Kai Tsa
Institutions
- Feng Chia University (TW)
Publication Details
- Journal
- Semiconductor Science and Technology
- Published
- 2025-09-30
- DOI
- https://doi.org/10.1088/1361-6641/ae0dae
- Citations
- 1
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.73