Enhanced phonon transmission at thin-film Si on diamond interface via microtransfer printing

The superior radiation tolerance of silicon-on-insulator (SOI) wafers makes them critical for next-generation IC/MEMS electronics in space technology and nuclear energy, and yet the inherently low thermal conductivity buried oxide layer severely impedes thermal management in SOI-based RF/power devices. While diamond offers exceptional thermal conductivity to enhance heat dissipation, its significant thermomechanical mismatch with silicon poses major challenges to reliable hetero-integration. Here we demonstrate a novel silicon film-on-diamond (SOD) heterostructure using microtransfer printing (μTP) technology, with comparative analysis against surface activated bonded silicon-on-silicon carbide (SOC) and conventional SOI wafers. The μTP-SOD samples exhibit near-zero residual stress (0.026 GPa) in the transferred Si layer and substantially reduced interfacial thermal resistance (ITR) compared to conventional SOI and SOC wafers. Integrated analysis of interfacial microstructures and molecular dynamics simulations reveals how interfacial structures and amorphous compositions govern the phonon thermal transport. Particularly, the amorphous SiO-SiC transition layer enhances phonon transmission at the μTP-SOD heterointerface to achieve a low ITR of 6.3 + 1.6/ –1.5 m<sup>2</sup>·K/GW. Finite element analysis verifies that these interfacial enhancements, combined with the diamond's exceptional thermal conductivity, reduce the device junction-temperature rise by 66.7% relative to SOI devices at 15 W/mm output power. The low residual stress and reduced ITR of μTP-SOD are expected to provide promising thermal management schemes for SOI-based electronics.

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Publication Details

Journal
Nano Research
Published
2025-09-30
DOI
https://doi.org/10.26599/nr.2025.94908110
Citations
3
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
2.19
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article

Enhanced phonon transmission at thin-film Si on diamond interface via microtransfer printing

Huarui Sun, Weiye Liu, Yongwei Chang, Shun Wan et al.
3 citations
Nano Research
Integrated Circuits and Semiconductor Failure Analysis
2.19
article

Enhanced phonon transmission at thin-film Si on diamond interface via microtransfer printing

Huarui Sun, Weiye Liu, Yongwei Chang, Shun Wan, Yinfei Xie, Lifa Zhang, Xiaonan Wang, Yang He, Yan Zhou, Shi Zhou
article en
3 citations

Abstract

The superior radiation tolerance of silicon-on-insulator (SOI) wafers makes them critical for next-generation IC/MEMS electronics in space technology and nuclear energy, and yet the inherently low thermal conductivity buried oxide layer severely impedes thermal management in SOI-based RF/power devices. While diamond offers exceptional thermal conductivity to enhance heat dissipation, its significant thermomechanical mismatch with silicon poses major challenges to reliable hetero-integration. Here we demonstrate a novel silicon film-on-diamond (SOD) heterostructure using microtransfer printing (μTP) technology, with comparative analysis against surface activated bonded silicon-on-silicon carbide (SOC) and conventional SOI wafers. The μTP-SOD samples exhibit near-zero residual stress (0.026 GPa) in the transferred Si layer and substantially reduced interfacial thermal resistance (ITR) compared to conventional SOI and SOC wafers. Integrated analysis of interfacial microstructures and molecular dynamics simulations reveals how interfacial structures and amorphous compositions govern the phonon thermal transport. Particularly, the amorphous SiO-SiC transition layer enhances phonon transmission at the μTP-SOD heterointerface to achieve a low ITR of 6.3 + 1.6/ –1.5 m<sup>2</sup>·K/GW. Finite element analysis verifies that these interfacial enhancements, combined with the diamond's exceptional thermal conductivity, reduce the device junction-temperature rise by 66.7% relative to SOI devices at 15 W/mm output power. The low residual stress and reduced ITR of μTP-SOD are expected to provide promising thermal management schemes for SOI-based electronics.

Nano ResearchVol. 18(11)
Openalex Percentile: Top 11%
Integrated Circuits and Semiconductor Failure Analysis
2.19
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