Design of Domestic Chip Scheduling Architecture for Smart Grid Based on Edge Collaboration

In order to improve the dispatch autonomy and localization control level of smart grid in complex operation environment, a domestic chip dispatch architecture based on edge collaboration is constructed, taking RISC-V architecture SoC and FPGA collaboration unit as the core, integrating the lightweight protocol stack, distributed collaboration mechanism, and edge-cloud scheduling strategy, and researching the optimization of multi-node scheduling and link adaptive mechanism. The system design covers key modules such as hardware architecture, communication protocols, state synchronization and scheduling security control, and has been validated in grid multi-source sensing and load prediction scenarios. It is analyzed that the architecture maintains the task response delay below 480ms and the scheduling stability fluctuation within $\pm 60 \mathrm{~ms}$ under high load conditions, and has good elasticity and robustness.

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Publication Details

Published
2025-06-20
DOI
https://doi.org/10.1109/icecai66283.2025.11170513
Primary Topic
Power Systems and Technologies
Type
article
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article

Design of Domestic Chip Scheduling Architecture for Smart Grid Based on Edge Collaboration

Guoping Xu, Feng Chen, Liang Yu, Shangxi Li et al.
Power Systems and Technologies
article

Design of Domestic Chip Scheduling Architecture for Smart Grid Based on Edge Collaboration

Guoping Xu, Feng Chen, Liang Yu, Shangxi Li, Hongjing Liang
article en

Abstract

In order to improve the dispatch autonomy and localization control level of smart grid in complex operation environment, a domestic chip dispatch architecture based on edge collaboration is constructed, taking RISC-V architecture SoC and FPGA collaboration unit as the core, integrating the lightweight protocol stack, distributed collaboration mechanism, and edge-cloud scheduling strategy, and researching the optimization of multi-node scheduling and link adaptive mechanism. The system design covers key modules such as hardware architecture, communication protocols, state synchronization and scheduling security control, and has been validated in grid multi-source sensing and load prediction scenarios. It is analyzed that the architecture maintains the task response delay below 480ms and the scheduling stability fluctuation within $\pm 60 \mathrm{~ms}$ under high load conditions, and has good elasticity and robustness.

Shenzhen Metro (China) (CN), BBK Electronics (China) (CN), Shenzhen Technology University (CN)
Openalex Percentile: Top 74%
Power Systems and Technologies
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