Adaptive Time Step Control for Semiconductor Simulations

This paper presents an adaptive time stepping strategy designed for semiconductor transient simulations. The strategy aims to reduce the overall computational cost by balancing nonlinear iterations with the local truncation error (LTE) based time step control. In addition to the LTE-based time step control, the method dynamically adjusts time steps based on the convergence behavior of Newton iterations. Although the total number of time steps may slightly increase, the reduction in step size enhances Newton iteration convergence, resulting in lower overall computational overhead. The numerical results of semiconductor switching processes demonstrate that the strategy reduces failed Newton iterations and enhances overall computational efficiency, and still effectively captures sharp physical variations.