Key Technologies Supporting High Performance and Reliability of SiC VMOSFET

4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) are beginning to be installed in electric vehicles (EVs), and the demand for reliability as well as chip performance is increasing. Generally, multiple chips are connected in parallel. Although SiC MOSFETs have a smaller temperature dependence of on-resistance (Ron) than Si MOSFETs, they are prone to current imbalance due to the negative temperature dependence of the threshold voltage (Vth), which is also affected by the dispersion of Vth, and is said to be a challenge for module stability and reliability 1 2 3. To solve this problem, appropriate chip classification, addition of inductance, and devising a new gate driving method are being considered 4 5 6. However, from the perspective of chip suppliers, ensuring uniformity of Vth is the top priority. So far, the high electron trap density at the MOS interface of SiC MOSFETs has been a major obstacle to improving performance. Post oxidation annealing (POA) technology after gate oxidation has improved channel mobility by passivating electron traps 7, and the channel resistance has been significantly reduced by increasing the channel density through the application of trench-type gates with sidewalls made of the crystal planes of 1-100 or 11-20 with the low electron trap density 8 9 10. However, since the electron trap density is strongly dependent on the crystal plane orientation 11 12, the interface charge density will vary if the crystal orientation of the MOS interface is misaligned. As a result, the angle misalignment of the trench sidewalls causes variations in Vth. In response to this, we have developed a V-shaped trench MOSFET (VMOSFET) with sidewalls made of 0-33-8 planes, which have the smallest electron trap density 13 14 15 16. Since V-shaped trenches are formed by a thermo-chemical etching in a chlorine gas ambient 17 18, the crystal planes are naturally exposed according to the chemical properties of 4H-SiC, the crystal orientation of the MOS interface is not essentially misaligned. Therefore, it is possible to manufacture chips with small variations in Vth and good reproducibility. In this paper, we introduce the unique device structures and manufacturing processes that support the performance and reliability of the VMOSFET and discuss the resulting Vth uniformity and stability in long-term reliability tests that comply with automotive reliability standards.