High Time-Resolution Transient Current-Based Characterization System for Traps in SiC MOSFET

High-density traps at the SiO2/SiC interface limit the performance and reliability of SiC metal-oxide-semiconductor field-effect transistors (MOSFET). Traps in SiC MOSFET devices are usually located at the SiC/SiO2 interface. Traps can capture electrons in the channel, increase on-resistance and cause threshold voltage instability, resulting in reduced switching efficiency and reliability, especially under high temperature or stress conditions. In this study, we optimized the transient current trap characterization method based on the Bayesian iterative deconvolution algorithm and investigated trap characteristics in SiC MOSFETs with different structures. A dedicated trap characterization system was constructed to enhance the time resolution and identification range of trap measurements. Furthermore, combining measurements from planar and trench gate structures, we analyzed trap differences caused by device structures. Using this approach, we investigated the trap mechanisms in SiC MOSFETs, primarily characterizing the trap locations, energy levels, and time constants. The results obtained show that there are three different types of traps and defects, namely near-interface oxide traps, interface traps, and trench gate structure process defects. This method achieves non-destructive characterization of traps and defects in SiC MOSFETs, and the process is relatively straightforward, providing novel insights into trap characterization.