Macro and Micro-Scale Non-Contact Imaging of Electrically Active Extended Defects in 4H-SiC Merged PiN Schottky Diode Devices

This study presents a novel approach to device yield estimation based on the non-contact, corona-based QUAD (Quality, Uniformity, and Defects) technique for inline defect mapping in SiC epitaxial layers. The approach is applied to a merged PiN Schottky (MPS) diode manufacturing process and is compared to final wafer-level electrical data. A new analysis method for QUAD defect mapping is introduced, incorporating die yield bin maps based on in-die depletion voltage values, allowing for a direct die to die comparison with standard EOL (End of the Line) electrical device testing. The QUAD mapping flow plan includes initial epi-wafers, the EOL wafers with measurement on metalized MPS dies, and the wafers after stripping off the metal. Micro-scale, μQUAD depletion voltage maps resolving individual dies gives further insight into the nature of the device failures. Novel results show processing induced failures associated with defective electrical isolation of diodes. The unique yield-killing effects of clusters of stacking fault triangular defects are evidenced by a catastrophic breakdown voltage collapse and QUAD depletion voltage collapse in clusters of failed dies near the wafer edges. A strong correlation between the inline QUAD bin map results and final failed device maps highlights the potential of QUAD as a practical and powerful inline tool. This technique, achieving a 94% capture of failing MPS dies, offers a complementary approach to UVPL defect imaging, identifying electrical killer-defects and enhancing the yield estimations.

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Publication Details

Journal
IEEE Transactions on Semiconductor Manufacturing
Published
2025-09-26
DOI
https://doi.org/10.1109/tsm.2025.3614854
Primary Topic
Semiconductor materials and interfaces
Type
article
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article

Macro and Micro-Scale Non-Contact Imaging of Electrically Active Extended Defects in 4H-SiC Merged PiN Schottky Diode Devices

Carlos Cristiano Oliveira de Faria Almeida, Adam Wincukiewicz, Robin Karhu, Marshall Wilson et al.
IEEE Transactions on Semiconductor Manufacturing
Semiconductor materials and interfaces
article

Macro and Micro-Scale Non-Contact Imaging of Electrically Active Extended Defects in 4H-SiC Merged PiN Schottky Diode Devices

Carlos Cristiano Oliveira de Faria Almeida, Adam Wincukiewicz, Robin Karhu, Marshall Wilson, Firas Faisal, Dmitriy Marinskiy, G. Polisski, Birgit Kallinger, Bradley Wilson, Cristina Crespo Soto, Liliana Giraldo Gutiérrez, J. Łagowski, Alexandre Savtchouk, Nils Steller
article en

Abstract

This study presents a novel approach to device yield estimation based on the non-contact, corona-based QUAD (Quality, Uniformity, and Defects) technique for inline defect mapping in SiC epitaxial layers. The approach is applied to a merged PiN Schottky (MPS) diode manufacturing process and is compared to final wafer-level electrical data. A new analysis method for QUAD defect mapping is introduced, incorporating die yield bin maps based on in-die depletion voltage values, allowing for a direct die to die comparison with standard EOL (End of the Line) electrical device testing. The QUAD mapping flow plan includes initial epi-wafers, the EOL wafers with measurement on metalized MPS dies, and the wafers after stripping off the metal. Micro-scale, μQUAD depletion voltage maps resolving individual dies gives further insight into the nature of the device failures. Novel results show processing induced failures associated with defective electrical isolation of diodes. The unique yield-killing effects of clusters of stacking fault triangular defects are evidenced by a catastrophic breakdown voltage collapse and QUAD depletion voltage collapse in clusters of failed dies near the wafer edges. A strong correlation between the inline QUAD bin map results and final failed device maps highlights the potential of QUAD as a practical and powerful inline tool. This technique, achieving a 94% capture of failing MPS dies, offers a complementary approach to UVPL defect imaging, identifying electrical killer-defects and enhancing the yield estimations.

IEEE Transactions on Semiconductor ManufacturingVol. 38(4)
Institut Mines-Télécom (FR), NXP (Germany) (DE), Fraunhofer Institute for Integrated Systems and Device Technology (DE), Advanced Applications (United States) (US), Semilab (Hungary) (HU)
Openalex Percentile: Top 79%
Semiconductor materials and interfaces
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