Energy-Efficient Hybrid Brent–Kung Parallel Prefix Adder Using LSB Approximation for FPGA-Based Grayscale Image Fusion

Efficient adder design is vital for real-time digital systems, especially in image processing applications. This paper proposes a hybrid Brent–Kung parallel prefix adder with selective least significant bit (LSB) approximation, achieving energy efficiency while maintaining accuracy in the most significant bits (MSBs). FPGA implementation on grayscale image fusion shows notable improvements, including ~21% reduction in dynamic power and ~66% lower logic utilization compared to exact adders. Experimental evaluation confirms preserved image quality with PSNR above 30 dB and SSIM ≈ 0.9, ensuring negligible perceptual loss. These results establish the proposed design as a promising solution for low-power VLSI applications