A Simple Burst-Mode Multiple-Entropy TRNG Based on Standard Logic Primitives

The paper introduces the concept of a True Random Number Generator (TRNG) based on an unstable circuit that uses only two types of logic devices: XOR gates and logic inverters forming delay lines. The core circuit ensures randomness in both the voltage (logical state) and time domains (duration of autonomous operation), while utilizing very few resources. Due to its low complexity, the proposed TRNG can be easily implemented in reconfigurable devices without sophisticated components such as Digital Clock Managers (DCM), Phase Locked Loops (PLL), or dedicated IP cores. The authors present a theoretical analysis of the TRNG using a Simulink macromodel, demonstrating chaotic behavior, and describe its implementation on a Complex Programmable Logic Device (CPLD) and additional verification on an FPGA. The randomness quality of the TRNG was validated using the standard National Institute of Standards and Technology (NIST) SP 800-22 battery of tests.