Proposal of HEMP Conducted Disturbance Test Method for Semi-Conductor Protective Devices on Electronic Circuit

Many consumer electronics are equipped with semi-conductor-based protective devices, such as a TVS-diode, a multilayer chip varistor or an ESD-suppressor, to protect internal circuits from steep surges produced by a lightning strike or electrostatic discharge (ESD). In the occurrence of a high-altitude electromagnetic pulse (HEMP) event, a strong pulsed electromagnetic wave may be induced on communication and/or power cables and penetrate sensitive electronics through them. To protect internal circuit from such pulses, protective devices are installed in a manner similar to lightning surge protection. During such events, these protective devices are subjected to high level of stress, potentially leading to performance degradation in characteristics such as threshold voltage and electrical insulation performance. Therefore, it is important to consider performance degradation; however, information regarding the degradation is often absent from datasheets of devices. Additionally, it is important for determining system-level malfunction to conduct immunity tests on consumer electronic apparatus while they are in operation condition. Thus, for the protection devices, tests should be conducted under powered conditions with the application of steady-state voltage to the devices. This paper describes novel test method for the semi-conductor protective devices against HEMP-induced conducted disturbance test and demonstrates that the degradation trends of the devices differ depending on whether a DC bias is applied during the HEMP conducted disturbance test.